Collaboration
Academic and industrial partners we work with.
Coming together is a beginning, keeping together is progress, working together is success.
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Research partners 12
Neuro-inspired Perception and Cognition Lab
We explore efficient perception using bio-inspired sensors and neuromorphic computing paradigms, focusing on multimodal event-based visual attention and efficient hardware processing of asynchronous, sparse data.
Computer Engineering Group
We collaborate on compiler optimizations for FPGA dataflow accelerators of quantized neural networks built with the open-source FINN framework. Together we developed scaled-integer range analysis (SIRA), which tracks the range, scale and bias of every tensor to generate smaller and more efficient streaming hardware.
AMD Research & Advanced Development
We collaborate on the efficient deployment of quantized neural networks on FPGAs using the open-source FINN dataflow compiler. Our joint work on scaled-integer range analysis (SIRA) reduces accumulator bitwidths and folds scales, biases and elementwise operations into thresholds, cutting the resource usage of FPGA dataflow accelerators.
Computer Architecture Laboratory (CAL)
We collaborate on energy-efficient hardware for AI at the edge, focusing on FPGA dataflow accelerators for quantized neural networks. Our joint work on scaled-integer range analysis (SIRA) uses interval arithmetic to derive the range, scale and bias of tensors, enabling narrower accumulators and cheaper streaming hardware.
Digital Systems and Integrated Circuits Division
We collaborated on implementation of graph neural networks for event-based data, mainly event audio sensors. We developed the first embedded solutions for audio classification and keyword spotting using SoC FPGA devices.
Faculty of Science and Technology, Department of System Design Engineering
We collaborated on implementation of graph neural networks for event-based data, mainly event audio sensors. We developed the first embedded solutions for audio classification and keyword spotting using SoC FPGA devices.
Robotics and Technology of Computers Lab (RTC)
We investigate the design of hardware-aware algorithms for event-based data processing on FPGAs, utilising audio data from Neuromorphic Auditory Sensors and visual data from Dynamic Vision Sensors. We combine our expertise in reconfigurable logic design with event-based perception.
VAADER team, Institute of Electronics and Digital Technologies (IETR)
We collaborated on applying Tangled Program Graphs (TPGs) to autonomous UAV control. We have compared their performance with deep reinforcement learning (DRL) in a task involving autonomous flight through an unknown environment.
Department of Electrical and Computer Engineering
We collaborated on an embedded vision system for automated drone landing site detection (eGPU and SoC FPGA). We published two papers: a demo at the DASIP 2018 conference and a paper at the ICCVG 2018 conference. Andre also served as a visiting professor in our group.
SDU Drone Center
We have recently started a collaboration on unmanned aerial vehicles (UAVs), combining our expertise in embedded vision and hardware acceleration with SDU's experience in drone technology and field operations. Our team members spent a week at the SDU Drone Center in Odense, and we also met there as part of EuroDroS.
Department of Electrical Engineering
Tomasz Kryjak served as a visiting professor at Polytechnique Montréal for two weeks in April 2024, hosted by Pierre Langlois and Jean-Pierre David.
SYEL (Systèmes Électroniques), LIP6 laboratory
We collaborated on applying graph neural networks to event-based data classification. This work resulted in three conference papers (SPA 2023, DASIP 2024 and FPT 2024) and a paper in the Journal of Systems Architecture (JSA, 2026). Additionally, Tomasz Kryjak was a visiting professor at the LIP6 lab in November 2022.